Counter is a very important device for electronics. It is used in many electronics circuits. A digital counter basically counts clock pulses applied to its clock pin. We can use it with display to visually see the digital pulse count. Digital counter with sensor is used to, for example count how many times sensor triggered. We can use heart beat count sensor to monitor heart pulses using digital counter display. This is one example; there are many applications of digital counter. Now there are two types of counter.
- Asynchronous counter (Ripple counter)
- Synchronous counter
Asynchronous counter or Ripple counter
An up counter counts up. In this counter external clock pulses are applied to only one flip-flop and other flip-flop gets clocks from ‘~Q’ output of previous one. At which flip-flop external clocks are applied ‘Q’ output of that flip-flop is LSB (least significant bit). If you don’t know what LSB is, then read this post. There are two types of asynchronous counter.
Asynchronous up counter
Now let’s see a 4 bit asynchronous up counter design.
The figure above is a 4 bit asynchronous up counter. It can count from 0 to 15, so possible number of output is 16. So, its mode is 16 that is 24, where 4 is number of flip-flops. At 16th clock this counter will reset to its initial position. It consists four D-type flip-flop. ‘D’ input of every flip-flop is connected to inverted Q (~Q) and clock pin of next flip-flop. As you can see that external clock pulse are given to first flip-flop but clock pulses for other flip-flops are ‘~Q’ output of previous one. ‘Q’ output is output of counter.
At initial condition when no external clocks are applied then ‘~Q’ output of all flip-flops will be high which is connected to ‘D’ input. When one external clock pulse is applied then first flip-flop will store that ‘1’ which was present on ‘~Q’. Now ‘Q’ output of first flip-flop will be high and ‘~Q’ will be low.
At second clock first flip-flop will reset and ‘Q’ output of first flip-flop will be low and ‘~Q’ will be high. Now clock input of second flip-flop got a low to high clock transition since it is connected to ‘~Q’ of first flip-flop. Second flip-flop will repeat all the process at every time ‘~Q’ output of changes its state from low to high. This process will apply to all the flip-flop which are connected in the circuit. This way this circuit counts up.
Let’s see 4 bit asynchronous counter waveform.
If you see the waveform carefully you will notice that external clock pulses is getting divide at every output. At the first output clock is divide by 2, at second output clock is divide 4 and so on. So counter can be used as digital frequency divider.
FN = FCLK/2N
FN = Frequency at QN
N = Number of flip-flop
We can write the truth table by creating a window of one external clock and checking the outputs in the waveform. For example see the figure below.
At first clock ‘Q0’ output is ‘1’, ‘Q1’ output is ‘0’, ‘Q2’ output is ‘0’ and ‘Q3’ output is ‘0’. Now let’s check outputs at second clock pulse.
At second clock ‘Q0’ output is ‘0’, ‘Q1’ output is ‘1’, ‘Q2’ output is ‘0’ and ‘Q3’ output is ‘0’. Now we will write the truth table by looking the outputs at every clock pulse.
|Clock||Q3||Q2||Q1||Q0||Decimal equivalent of binary output|
As you can see that this counter is counting from 0 to 15, so this is an up counter and the table above is the truth table of 4 bit up counter.
Asynchronous down counter
A down counter counts down and as we already know that external clock pulses are given to only one flip-flop in asynchronous counter. In this counter we take outputs from ‘~Q’ output.
As you can see that we have just change the output positions to make it down counter. Whereas all the rest circuit is similar to the up counter. Now let’s see its output waveform.
We can find the truth table using previous method; we used to find truth table of up counter.
|Clock||Q3||Q2||Q1||Q0||Decimal equivalent of binary output|
In synchronous counter external clock pulses is given to all flip-flops. But we use additional logic in this counter. There are two types of synchronous counter as well as asynchronous counter.
Synchronous up counter
As we know that an up counter counts up. There are two types of synchronous up counter.
1. Synchronous up counter with ripple carry
Let’s see the design of a 4 bit synchronous up counter with ripple carry.
Timing diagram (timing waveform) and truth table is same asynchronous up counter. As you can see that it has AND gate at every flip flop except first one which is LSB flip flop. Every AND gate has two input. Output of every AND gate are AND’ed output of previous all flip-flops and it is input of the next flip-flop. To give AND’ed output of previous all flip-flops to next AND gate, output of previous AND gate is given to next the next and gate. This type of counter is called “ripple carry counter”.
Now let’s understand the working of this counter. You can see that all JK flip-flop is configured as T flip flop. Input of first T flip flop is fixed which is high (1) and output is given to next flip flop input and first AND gate. Output of second flip flop is given to first AND gate and output of first AND gate is given to next flip flop input. Then this sequence is repeated for all the next flip flops.
As we give clock pulses to this circuit, first flip flop will toggle and its output will becomes high. Now input of second input is high and as next clock pulse is given then second flip flop will toggle and it will become high. First flip flop will also toggle at the second clock and it will become low. At the third clock, first flip flop will toggle and will become high but since input of second flip flop was low, it will not toggle and will remain high. Now the first AND gate is now active and its output will high, which is the input of third flip flop. At the fourth clock pulse is given, first and second flip- flops will be low and third flip flop will toggle and it will become high. This process will repeat for all flip flops.
2. Synchronous up counter without ripple carry counter
Let’s see the design of a 5 bit synchronous up counter without ripple carry.
In this counter input of AND gate is increasing as flip-flop increases. Because we not giving the output of previous AND to next AND gate instead we are directly giving all previous flip flops output to AND gate. So, as the number of flip flop increases, number of AND gate input also increases. This type of flip flop is called “without ripple carry counter”. Working of this counter is same as explained earlier.
Synchronous down counter
We know that to convert a up counter into down counter we just have to change the position of output in flip-flops. So, let’s see the circuit for both type of synchronous down counter.
1. Synchronous down counter with ripple carry
Let’s see the logic circuit for synchronous down counter with ripple carry.
So, as you can see that we have changed the output from ‘Q’ output to ‘~Q’ output to achieve down counter.
2. Synchronous down counter without ripple carry
Let’s see the logic circuit for synchronous down counter without ripple carry.
So, as you can see also in this counter that we have changed the output from ‘Q’ output to ‘~Q’ output to achieve down counter.
Special type of counter
There are some special type of counter available and they are “Ring counter” and “Johnson counter”. Let’s see them one by one.
This is a special type of synchronous counter. It is a shift type counter so it is also called shift counter. In this counter data shifts from right to left or left to right. Let’s see the logic circuit of ring counter.
As you can see that output of last flip-flop is the input for first flip flop, output of first flip-flop is input for second flip-flop and so on. So data will shift from left to right. In this counter rightmost or leftmost flip-flop is initially set to ‘1’ and all other flip-flop is cleared. At every clock pulse this ‘1’ will be shifted. Now let’s see the truth table of ring counter.
Counting step of ring counter will be 20, 21, 22….2N-1. where N is the number of flip flop.
FOUT = FCLK/N
This is also a special type synchronous counter. We had to preset one flip-flop in ring counter but in Johnson counter feedback is given form “~Q” output of last flip-flop. We have to just clear all flip flops.
As you can see that “~Q” output of last flip-flop is the input for first flip flop, output of first flip-flop is input for second flip-flop and so on. So data will shift from left to right. In this counter we don’t have to initially set LSB or MSB flip flop to ‘1’, we just have to clear all flip-flops. At first clock pulse ‘1’ which is on “~Q3” will be shifted and it will be stored in Q0 till “~Q3” is not ‘0’. Now let’s see the truth table of Johnson counter.
Applications of counter
- Counting any digital pulse
- Frequency division
- Digital clocks
- Analog to digital converter (ADC)
Some counter chips (counter IC)
- 74HC161:- It is a 4 bit synchronous BCD (Binary Coded Decimal) counter with asynchronous reset. It is manufactured by Texas Instruments (TI).
- 74HC163:- It is a 4 bit synchronous binary counter with asynchronous reset and synchronous load. It is manufactured by Texas Instruments (TI).
- 74HC191:- It is a 4 bit synchronous binary up/down counter with asynchronous reset and synchronous load. It is manufactured by NXP.
- 74HC160:- It is a 4 bit pre-settable synchronous BCD counter with asynchronous reset. It is manufactured by NXP.
- CD4017B:– It is a 4-stage synchronous decade counter with decoded outputs (0-9). For more information click here.