Register in digital electronics stores binary numbers. It is a collection of flip-flops which stores digital data as binary numbers. One flip-flop can store one bit data. In shift registers always ‘D’ flip- flop is used. A shift register, as name suggests, shifts data (numbers) which is stored in flip-flops at every clock pulse. It has one or more input(s) depending upon type of input. It can be one in serial input and more than one in parallel input. Just like input, it can be one or more output(s) depending upon type of output.
Depending on type of input and output, there are four types of shift register.
- Serial input serial output (SISO)
- Serial input parallel output (SIPO)
- Parallel input serial output (PISO)
- Parallel input parallel output (SISO)
Table of Contents
Serial in serial out (SISO) shift register
In this type of register, input is given serially and output is also taken serially.
As you can see that output of first flip-flop is given to the input of second flip-flop and so on. Clock of all flip-flops are same. Now assume that we have a binary number ‘1101’ and we want to give it serially to a shift register and we want this number at output serially. Let’s see how we do that.
We have four binary digits in our number, so we have to input one digit at one clock. That means first we will give the LSB (Least Significant Bit) of the number which is right most digit ‘1’ at the input. Then we have to give a rising clock pulse at clock input. This ‘1’ will be stored in the first flip-flop and it will be input for the second flip-flop. Then we have to give the ‘0’ input at the first flip-flop’s input and a rising clock pulse. Now that ‘0’ will be stored in the first flip-flop that is the input for second flip-flop and ‘1’ in the second flip-flop that is the input for third flip flop. This way shift register shifts the number. After 4 clocks our data will be stored in the register and LSB of our number will be present at output.
So, we have to give three more clock pulse to get our data (number). In this process number of clock that is given is 7. So we can find the relation between number of flip-flops and clock pulse for SISO shift register.
Number of clock pulse in SISO shift register = 2N-1 where N is number of flip flops
This was the right shift of data. We can left shift data using this shift register. We have to just flip all flip-flops and give the data at last flip flop.
Now let’s see the truth table of SISO shift register.
Serial in parallel out (SIPO) shift register
In this type of register, input is given serially and it gives parallel data which is given serially.
In this shift register we have taken the output of every flip-flops as output of shift register instead of taking the output of last flip-flop as we have taken in previous circuit.
Here working principle is same as explained previously. We have load data by shift one by one bit at a time. After shifting all four digits of number, it will be at parallel output. We don’t have to give that extra three clock pulse which we gave in SISO shift register for taking output.
So in SIPO shift register number of clock pulses for storing the data and taking it on output is equal to N. Where N is equal to number of flip-flops. So, as you can see that SIPO is faster than SISO shift register.
Now, let’s have a look at SIPO shift register truth table.
Parallel in serial out (PISO) shift register
In this type of register, we give parallel input and take output serially.
In this shift register we have given the input to every flip-flops as input of shift register instead of giving the input at first flip-flop as we have given in previous circuit. We have taken the output from last flip-flop.
In this shift register we will load data parallelly. For store data we have to give the data at every input pins and give a rising clock pulse. MSB of data should be given to I3 and LSB of data should be given to I0.
Now we know that data will be stored and LSB of our data will be available at output at one cock pulse. So we have to give three more clocks to get our data serially. Remember that we have to remove our data from inputs after storing it.
So in PISO shift register number of clock pulses for storing the data and taking it from output is equal to number of flip-flops.
Now, let’s have a look at SIPO shift register truth table.
Parallel in parallel out (PIPO) shift register
In this type of register, we give parallel input and it gives output in parallel.
In this shift register we have given the input to all flip-flops as well as taken output from all flip-flop. This shift register one clock pulse is needed to process complete storing and output the data. So, this is the fastest shift register. PISO shift register is generally used to hold data.
This is a special type of register in which all functionality is integrated such as parallel input/output, holding data, left and right shift data. Let’s see the logic circuit of universal shift register. In this shift register we use 1 of 4 data selector/multiplexer. In this 1 of 4 multiplexer there are 2 selector lines to select the 1 out of 4 inputs. we have to design such shift register circuit in which these condition should be satisfied.
|Select line 2 (S1)
|Select line 1 (S0)
|Shift register operation
|Parallel input parallel/serial output
Now let’s see the circuit design step by step. First we have to impalement hold condition when both select lines are ‘0’. When both select lines are zero then first input (labeled by I0) of multiplexer is connected to output.
This circuit will hold the data when S0 and S1 line are low. As we know when both select lines of multiplexer are low then “I0” line will be connected to output. So, whatever the output of each flip flop is, that is the input of each multiplexer and so it is the input of each flip flop also. So, flip-flops will load data whatever its output is. This way this circuit will hold the data when both select lines are low.
We want to right shift data when S1 is low and S0 is high. When S1 is low and S0 is high then output of mux will be the data which is given to “I1” input. For right shift the data, we have to move the data which is on Q3 to Q2. And for doing this we have to give the output of rightmost flip-flop to the input of next flip-flop. So, let’s see the logic circuit for this.
As we know that when S1 is low and S0 is high then output of mux is connected to “I1” input. “I1” input is connected with output of next flip-flop as you can see. So, input of Q3, Q2, Q1 and Q0 will be output of respectively Q0, Q3, Q2 and Q1. As you can see that data is shifting right.
Now we want to left shift data when S1 is high and S0 is low. When S1 is high and S0 is low then output of mux will be the data which is given to “I2” input. For left shift data, we have to move the data which is on Q0 to Q1. And for doing this we have to give the output of leftmost flip-flop to the input of previous flip-flop. So, let’s see the logic circuit for this.
As we know that when S1 is high and S0 is low then output of mux is connected to “I2” input. And “I2” input is connected with output of previous flip-flop as you can see. So, input of Q3, Q2, Q1 and Q0 will be output of respectively Q2, Q1, Q0 and Q3. As you can see that data is shifting left.
Now we want to load data parallelly when S1 is high and S0 is also high. When both select lines are high then output of mux will be “I3” input. For parallelly load data, we have to give the data at “I3” of all multiplexers. Let’s see the logic circuit for this.
As we know that when both select lines are high then output of mux is connected to “I3” input. If we give data to “I3” of all multiplexers then it will be directly applied to the input of all flip-flops. So, we can give parallel data input to shift register. This I how an universal shift register works.
Applications of shift register
- Serial to parallel or parallel to serial data conversion
- Left/Right shift data
- To store data
- To increase the number of input/output pins in any microcontroller
Some shift register chips (IC)
- 74HC164:- This is an 8 bit SIPO shift register.
- 74HC595:– 8 bit PISO shift register.
- 74HC595:– It is also an 8 bit SIPO shift register. But it has an additional output shift register which hold previous data during shifting. After shifting we can give a high pulse to its shift out pin to output shifted data.
- CD4019B:- Four bit bidirectional universal shift register.
- 54HC194:– High speed CMOS logic 4 bit universal shift register.
- 74HC323A:– 8 bit universal shift register.